Step - Step with time delay
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Connection Diagram:
![]() | STEP | |
Connections(1) | Position | Remark |
STEP | Right | Output step function |
Parameters(2) | Default | Remark |
TimeDelay | 2ms | Delay before the output becomes 1 |
Amplitude | 1 | Amplitude of the step signal |
Function | The output of this block is (Amplitude) if the simulation time is larger than the specified time delay, otherwise it is zero. |
Status | Standard | |
Export of Embedded C Code | YES |
Select from | Components\Library\ElectricalMachines\IRTF\Control\Source |
See also
Carrier, FallingEdge, RisingEdge, SawTooth, sin, SquareWave, TriangleWave,