LogicDelayC - Logic Delay
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Connection Diagram:
INL1 | ||
IN | ![]() | OUTDELSY |
TAU |
Connections(4) | Position | Remark |
TAU | Bottom | |
OUTDELSY | Right | |
INL1 | Top | |
IN | Left |
Parameters(0) | Default | Remark |
Function | Delay block for delaying a gate control signal. |
Status | Standard | |
Export of Embedded C Code | YES |
Select from | Components\Library\Control\Digital\Delay |
See also
LogicDelay,