SR-LATCH - Clocked SR-Latch

preview

Connection Diagram:

C Q
RQN
S    
    

Connections(5)PositionRemark
S Left Set
R Left Reset
QN Right Inverted Output
Q Right Output
C Left Control

Parameters(0)DefaultRemark

Function The SR-Latch changes state as long as the clock input C remains high

Status Standard
Export of Embedded C Code YES

Select from Components\Library\Control\Digital\Latches

See also
D-Latch,
© 2024 CASPOC, All rights reserved. Home   |   Terms and Conditions   |   Legal   |   Export Compliance   |   Privacy Policy   |   Site Map