IR2111 - Logic Delay
Connection Diagram:
| R1 | R2 | R3 | |||
|
| |||||
| L1 | L2 | L3 | L4 | ||
| Connections(43) | Position | Remark |
| R3 | Top | |
| R2 | Top | |
| R1 | Top | |
| L4 | Bottom | |
| L3 | Bottom | |
| L2 | Bottom | |
| L1 | Bottom |
| Parameters(4) | Default | Remark |
| HighPullResistance | 50 | On resistance of the high Mosfet when the output is HIGH |
| LowSinkResistance | 28 | On resistance of the lower Mosfet when the output is LOW |
| UuvLOmin | 8.2 | Undervoltage supply voltage when the device turns off |
| UuvLOplus | 8.6 | Undervoltage supply voltage when the device turns on |
| Function | Delay block for delaying a gate control signal. | |
| Status | Standard | |
| Select from | Components\Library\Breadboard\IC\GateDriver | |
See also
IR2110, IR2112, IR2113,